Struct ProcessorCapacityAndFeatureInfo
pub struct ProcessorCapacityAndFeatureInfo { /* private fields */ }
dep_raw_cpuid
only.Expand description
Processor Capacity Parameters and Extended Feature Identification (LEAF=0x8000_0008).
This function provides the size or capacity of various architectural parameters that vary by implementation, as well as an extension to the 0x8000_0001 feature identifiers.
§Platforms
✅ AMD 🟡 Intel
Implementations§
§impl ProcessorCapacityAndFeatureInfo
impl ProcessorCapacityAndFeatureInfo
pub fn physical_address_bits(&self) -> u8 ⓘ
pub fn physical_address_bits(&self) -> u8 ⓘ
pub fn linear_address_bits(&self) -> u8 ⓘ
pub fn linear_address_bits(&self) -> u8 ⓘ
pub fn guest_physical_address_bits(&self) -> u8 ⓘ
pub fn guest_physical_address_bits(&self) -> u8 ⓘ
Guest Physical Address Bits
This number applies only to guests using nested paging. When this field is zero, refer to the PhysAddrSize field for the maximum guest physical address size.
§Platforms
✅ AMD ❌ Intel (reserved=0)
pub fn has_cl_zero(&self) -> bool
pub fn has_cl_zero(&self) -> bool
pub fn has_inst_ret_cntr_msr(&self) -> bool
pub fn has_inst_ret_cntr_msr(&self) -> bool
pub fn has_restore_fp_error_ptrs(&self) -> bool
pub fn has_restore_fp_error_ptrs(&self) -> bool
pub fn has_invlpgb(&self) -> bool
pub fn has_invlpgb(&self) -> bool
pub fn has_mcommit(&self) -> bool
pub fn has_mcommit(&self) -> bool
pub fn has_wbnoinvd(&self) -> bool
pub fn has_wbnoinvd(&self) -> bool
pub fn has_int_wbinvd(&self) -> bool
pub fn has_int_wbinvd(&self) -> bool
pub fn has_unsupported_efer_lmsle(&self) -> bool
pub fn has_unsupported_efer_lmsle(&self) -> bool
pub fn has_invlpgb_nested(&self) -> bool
pub fn has_invlpgb_nested(&self) -> bool
INVLPGB support for invalidating guest nested translations if set.
§Platforms
✅ AMD ❌ Intel (reserved=false)
pub fn perf_tsc_size(&self) -> usize ⓘ
pub fn perf_tsc_size(&self) -> usize ⓘ
Performance time-stamp counter size (in bits).
Indicates the size of MSRC001_0280[PTSC]
.
§Platforms
✅ AMD ❌ Intel (reserved=false)
pub fn apic_id_size(&self) -> u8 ⓘ
pub fn apic_id_size(&self) -> u8 ⓘ
APIC ID size.
A value of zero indicates that legacy methods must be used to determine
the maximum number of logical processors, as indicated by CPUID
Fn8000_0008_ECX[NC]
.
§Platforms
✅ AMD ❌ Intel (reserved=0)
pub fn maximum_logical_processors(&self) -> usize ⓘ
pub fn maximum_logical_processors(&self) -> usize ⓘ
The size of the apic_id_size
field determines the maximum number of
logical processors (MNLP) that the package could theoretically support,
and not the actual number of logical processors that are implemented or
enabled in the package, as indicated by CPUID Fn8000_0008_ECX[NC]
.
MNLP = (2 raised to the power of ApicIdSize[3:0])
(if not 0)
§Platforms
✅ AMD ❌ Intel (reserved=0)
pub fn num_phys_threads(&self) -> usize ⓘ
pub fn num_phys_threads(&self) -> usize ⓘ
pub fn invlpgb_max_pages(&self) -> u16 ⓘ
pub fn invlpgb_max_pages(&self) -> u16 ⓘ
pub fn max_rdpru_id(&self) -> u16 ⓘ
pub fn max_rdpru_id(&self) -> u16 ⓘ
Trait Implementations§
§impl Debug for ProcessorCapacityAndFeatureInfo
impl Debug for ProcessorCapacityAndFeatureInfo
impl Eq for ProcessorCapacityAndFeatureInfo
impl StructuralPartialEq for ProcessorCapacityAndFeatureInfo
Auto Trait Implementations§
impl Freeze for ProcessorCapacityAndFeatureInfo
impl RefUnwindSafe for ProcessorCapacityAndFeatureInfo
impl Send for ProcessorCapacityAndFeatureInfo
impl Sync for ProcessorCapacityAndFeatureInfo
impl Unpin for ProcessorCapacityAndFeatureInfo
impl UnwindSafe for ProcessorCapacityAndFeatureInfo
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